Siemens and TSMC expand AI-powered chip design collaboration

Siemens and Taiwan Semiconductor Manufacturing Company (TSMC) are expanding their collaboration to bring AI-powered automation further into semiconductor design, with a new focus on reducing manual work and speeding up the development of increasingly complex chips.

The companies announced the developments at the 2026 TSMC Open Innovation Platform (OIP) Ecosystem Forum, held in the United States. The collaboration brings together Siemens’ electronic design automation (EDA) software with TSMC’s advanced semiconductor manufacturing and packaging technologies.

One of the key developments is an AI-powered agent designed to automatically identify and fix design rule check (DRC) violations across digital and custom integrated circuit design workflows.

The system combines Siemens’ Calibre software with Aprisa and Solido technologies. DRC is an important stage of chip development, checking designs against manufacturing rules before a chip can move towards production.

Siemens says the new AI-based approach can analyse violations, determine potential solutions and help engineers resolve problems with less manual intervention. The aim is to improve productivity and shorten the time required to take a chip design through to tapeout.

The companies are also working on what Siemens describes as agentic EDA workflows. These systems are designed to perform longer and more complex engineering tasks, working across multiple EDA tools while continuously checking and validating their results.

Siemens’ Fuse EDA AI System and Fuse EDA AI Agent are being developed to support these autonomous workflows. The technology is intended to allow AI agents to reason across multiple stages of semiconductor design rather than simply performing individual automated tasks.

The collaboration also includes AI-assisted place-and-route and digital implementation capabilities through Siemens’ Aprisa software, together with custom IC design capabilities using Solido Fuse.

Siemens says these technologies can automate repetitive tasks, provide engineers with design guidance and help improve design convergence as semiconductor projects become more complicated.

The partnership also extends beyond conventional chip design. Siemens’ EDA portfolio is being enabled for TSMC’s advanced process technologies, 3DFabric advanced packaging technologies and silicon photonics design requirements.

This is becoming increasingly important as AI processors move towards larger and more complex multi-die designs, where several semiconductor components can be combined within a single package.

The growing use of advanced packaging and increasingly sophisticated manufacturing processes is placing greater demands on the software used to design and verify chips. TSMC’s OIP ecosystem brings together the foundry and EDA companies to ensure that design tools can support its latest manufacturing technologies.

AI is therefore becoming involved at more stages of semiconductor development, from initial design and implementation through verification and preparation for manufacturing.

Siemens and TSMC say their latest work is intended to help engineers manage this increasing complexity while maintaining performance and energy-efficiency requirements.

The development highlights the growing role of AI within the semiconductor industry, where automated engineering tools are increasingly being used alongside human designers rather than simply replacing individual manual tasks.

As chip designs become more complex and advanced manufacturing technologies require increasingly detailed verification, Siemens and TSMC are positioning AI-powered automation as a way of helping engineers reduce development time and move new semiconductor designs towards production more efficiently.